| 发明名称 |
INTEGRATED CIRCUIT DESIGN METHOD AND APPARATUS |
| 摘要 |
An integrated circuit design method comprises extracting parallel-connected parameters associated with circuit components of an integrated circuit (IC) based on a determination that the circuit components are connected in parallel. The method also comprises generating a parallel netlist that describes the circuit components, the parallel netlist comprising the parallel-connected parameters. The parallel-connected parameters are taken into consideration by a simulation that determines the performance capabilities of the IC. |
| 申请公布号 |
US2015269305(A1) |
申请公布日期 |
2015.09.24 |
| 申请号 |
US201414258332 |
申请日期 |
2014.04.22 |
| 申请人 |
TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD. |
发明人 |
CHEN Shih Hsin;LIU Kai-Ming |
| 分类号 |
G06F17/50 |
主分类号 |
G06F17/50 |
| 代理机构 |
|
代理人 |
|
| 主权项 |
1. An integrated circuit design method performed by a processor, the method comprising:
extracting parallel-connected parameters associated with circuit components of an integrated circuit (IC) based on a determination that the circuit components are connected in parallel; and generating a parallel netlist that describes the circuit components, the parallel netlist comprising the parallel-connected parameters. |
| 地址 |
Hsinchu TW |
