Optimized ESD Clamp Circuitry

摘要

ESD protection circuitry is disclosed. In one embodiment, an integrated circuit includes first and second sensor circuits. The first sensor circuit has a first resistive-capacitive (RC) time constant, while the second sensor circuit has a second RC time constant. The RC time constant of the first sensor circuit is at least one order of magnitude greater than that of the second sensor circuit. A first clamp transistor is coupled to and configured to be activated by the first sensor circuit responsive to the latter detecting an ESD event. A second clamp transistor is coupled to and configured to be activated by the second sensor circuit responsive to the latter detecting the ESD event.

主权项

1. A apparatus comprising:
a first sensor circuit; a second sensor circuit, wherein each of the first and second sensor circuits are configured to detect an electro-static discharge (ESD) event; and first and second clamp transistors configured to be activated by the first and second ESD sensor circuits, respectively, responsive to detection of the ESD event; wherein a resistive-capacitive (RC) time constant of the first sensor circuit is greater than an RC time constant of the second sensor circuit.