发明名称 |
Multilevel conversion circuit |
摘要 |
In aspects of the invention, a multilevel conversion circuit can include a configuration for linking capacitors, including diodes, reverse-blocking semiconductor switches, and resistors, and a circuit for clamping the capacitor voltage at a specified voltage. Such a configuration can serve to reduce the number of capacitors that need detection of the voltages thereof and appropriate changing-over operation of semiconductor switches to control the capacitor voltage to a desired value. By way of aspects of the invention, desired voltages can be provided to the capacitors. |
申请公布号 |
US9143054(B2) |
申请公布日期 |
2015.09.22 |
申请号 |
US201414242331 |
申请日期 |
2014.04.01 |
申请人 |
FUJI ELECTRIC CO., LTD. |
发明人 |
Kuwahara Hiroyuki |
分类号 |
H02M1/32;H02M7/5387;H02M1/34;H02M7/493;H02M7/537;H02M7/483;H02M7/487 |
主分类号 |
H02M1/32 |
代理机构 |
Rossi, Kimms & McDowell LLP |
代理人 |
Rossi, Kimms & McDowell LLP |
主权项 |
1. A multilevel conversion circuit that generates multi-levels of voltage from a DC power supply provided with three terminals, composed of two single power supplies, and having three different voltage levels including zero, and selects and delivers the multi-levels of voltage, the multilevel conversion circuit comprising:
first and second switch groups, each switch group comprising series-connected n semiconductor switches, n being an integer of three or larger, having an antiparallel-connected diode; third and fourth switch groups, each switch group comprising series-connected (n−1) semiconductor switches; and an AC switch composed of a combination of reverse-blocking semiconductor switches; wherein a series circuit of the first switch group and the second switch group is connected between a first DC terminal that is one of the three terminals of the DC power supply at the highest potential and a third DC terminal that is one of the three terminals of the DC power supply at the lowest potential, the first switch group being connected to the first DC terminal; a series circuit of the third switch group and the fourth switch group is connected between a negative terminal of a first semiconductor switch composing the first switch group and a positive terminal of an n-th semiconductor switch composing the second switch group, the third switch group being connected to the negative terminal of the first semiconductor switch of the first switch group; the AC switch is connected between a connection point of the third switch group and the fourth switch group and a second DC terminal that is one of the three terminals of the DC power supply at a middle potential; a j-th capacitor, j being an integer from 1 to (n−2), is connected between a positive terminal of an (n−m)-th semiconductor switch composing the first switch group, m being an integer from 0 to (n−3), and a negative terminal of a k-th semiconductor switch composing the second switch group, k being an integer from 1 to (n−2); an (n−1)-th capacitor is connected between a positive side terminal of the third switch group and a negative side terminal of the fourth switch group; an i-th capacitor, i being an integer from n to (2n−3), is connected between a positive terminal of (n−m−1)-th semiconductor switch composing the third switch group and a negative terminal of k-th semiconductor switch composing the fourth switch group; a connection point between the first switch group and the second switch group is an AC terminal; and a linking means connects a terminal of the j-th capacitor and a terminal of the i-th capacitor. |
地址 |
JP |