发明名称 Secure processor and a program for a secure processor
摘要 The instruction code including an instruction code stored in the area where the encrypted instruction code is stored in a non-rewritable format is authenticated using a specific key which is specific to the core where the instruction code is executed or an authenticated key by a specific key to perform an encryption processing for the input and output data between the core and the outside.
申请公布号 US9141829(B2) 申请公布日期 2015.09.22
申请号 US201314091479 申请日期 2013.11.27
申请人 SOCIONEXT INC. 发明人 Goto Seijo;Kamada Jun;Tamiya Taijji
分类号 G06F11/30;G06F12/14;G06F21/70;G06F21/52;G06F21/55;G06F21/57;G06F21/64;G06F21/71;G06F21/72 主分类号 G06F11/30
代理机构 Staas & Halsey LLP 代理人 Staas & Halsey LLP
主权项 1. A processor comprising: an execution unit configured to output a first virtual address; a mode register configured to indicate whether the processor is in a first mode in which an access to a secure address space is permitted or in a second mode in which an access to the secure address space is prohibited; and a memory access control unit configured to output a first physical address corresponding to the first virtual address by referring to either a first translation look aside buffer for the first mode or a second translation look aside buffer for the second mode in accordance with a value of the mode register, wherein, by executing a first instruction code stored in the secure address space in the first mode, a second instruction code is checked in the first mode before the second instruction code is executed in the second mode, and wherein, in the second mode, the memory access control unit prohibits an access to a physical address within the secure address space in accordance with the second translation look aside buffer.
地址 YOKOHAMA JP