发明名称 Semiconductor integrated circuit device
摘要 A semiconductor integrated circuit device includes a pair of complementary signal lines, a first transistor including a gate, a source, and a drain, one of the source and the drain of the first transistor being coupled to one of the pair of the complementary signal lines, and a second transistor including a gate, a source, and a drain, the gate of the second transistor being coupled to the gate of the first transistor, one of a source and a drain of the second transistor coupled to an other of the source and the drain of the first transistor, and an other of the source and the drain of the second transistor being coupled to the other of the pair of the complementary signal lines. A direction of a gate width of the first transistor is different from a direction of a gate width of the second transistor.
申请公布号 US9142559(B2) 申请公布日期 2015.09.22
申请号 US201414524966 申请日期 2014.10.27
申请人 RENESAS ELECTRONICS CORPORATION 发明人 Takahashi Hiroyuki;Yamano Seiya
分类号 G11C7/02;H01L27/108;G11C7/18;G11C7/12;H01L27/02;H01L21/8234;H01L27/088;H01L29/10 主分类号 G11C7/02
代理机构 McGinn IP Law Group, PLLC. 代理人 McGinn IP Law Group, PLLC.
主权项 1. A semiconductor integrated circuit device, comprising: a pair of complementary signal lines; a first transistor including a gate, a source, and a drain, one of the source and the drain of the first transistor being coupled to one of the pair of the complementary signal lines; and a second transistor including a gate, a source, and a drain, the gate of the second transistor being coupled to the gate of the first transistor, one of a source and a drain of the second transistor being coupled to an other of the source and the drain of the first transistor, and an other of the source and the drain of the second transistor being coupled to an other of the pair of the complementary signal lines, wherein a direction of a gate width of the first transistor is different from a direction of a gate width of the second transistor.
地址 Kawasaki-Shi, Kanagawa JP