Semiconductor device including latency counter

摘要

For example, a semiconductor device includes a first latency counter, which selects whether to give an odd-cycle latency to an internal command signal; and a second latency counter, which gives a latency to an internal command signal at intervals of two cycles. The latency counters are connected in series. Since the number of bits in control information, which is used to set a latency, is smaller than the types of settable latency as a result, it is possible to reduce wiring density.

主权项

1. A method comprising:
supplying, using one of first and second latency counters, an internal command signal to a command output line when a predetermined latency elapses after the internal command signal is supplied to the other of the first and second latency counters from a command input line; selecting whether to give the internal command signal an odd-cycle latency based on first control information; and based on second control information, effecting upon the internal command signal, a latency at intervals of two cycles.