发明名称 Emphasis signal generating circuit
摘要 An emphasis signal generating circuit includes: a branch circuit configured to split a signal into a plurality of paths; a delay circuit provided in one or more of the paths into which the signal has been split by the branch circuit, the delay circuit being configured to delay one or more signals; a phase compensation circuit provided in one or more of the paths into which the signal has been split by the branch circuit, the phase compensation circuit having such characteristics that a transmission intensity of a signal is low in a low frequency band and is high in a high frequency band; and an addition/subtraction circuit configured to perform addition and/or subtraction of signals from the plurality of paths and output a result.
申请公布号 US9143241(B2) 申请公布日期 2015.09.22
申请号 US201313973457 申请日期 2013.08.22
申请人 FUJITSU LIMITED 发明人 Tsunoda Yukito
分类号 H04B10/12;H04B10/588 主分类号 H04B10/12
代理机构 Staas & Halsey LLP 代理人 Staas & Halsey LLP
主权项 1. An emphasis signal generating circuit, comprising: a branch circuit configured to split a signal into a plurality of paths; a delay circuit provided in one or more of the paths into which the signal has been split by the branch circuit, the delay circuit being configured to delay one or more signals; a phase compensation circuit provided in one or more of the paths into which the signal has been split by the branch circuit, the phase compensation circuit having such characteristics that a low intensity of a transmission signal appears in a low frequency band, a maximum intensity of the transmission signal appears in a high frequency band, and a phase of the transmission signal approaches from a near-zero degree in the low frequency band to near-90 degrees around a middle frequency band and returns to the near-zero degree in the high frequency band; and an addition/subtraction circuit configured to perform addition and/or subtraction of signals from the plurality of paths and output a result.
地址 Kawasaki JP