Selecting memory cells using source lines

摘要

A memory device comprises memory cells arranged in rows and columns, and source lines associated with memory sections, each of which includes a plurality of memory cells. Source terminals of transistors included in the memory cells in a first memory section are physically coupled to a first source line that is distinct from other source lines associated with other memory sections on a same row of the memory device as the first memory section. Gate terminals of transistors included in memory cells in a row share a common wordline configured for providing a signal to the gate terminals.

主权项

1. A memory device comprising:
memory cells arranged in rows and columns; and source lines associated with memory sections, wherein a memory section includes a plurality of memory cells, wherein source terminals of transistors included in the memory cells in a first memory section are physically coupled to a first source line that is distinct from other source lines associated with other memory sections on a same row of the memory device as the first memory section, wherein for an erase operation of the first memory section:
the first source line is configured to provide a first voltage while source lines for the other memory sections on the same row are configured to provide a second voltage that is different from the first voltage, anda wordline and a sense gate line corresponding to the first memory section are configured to provide non-zero voltages while wordlines and sense gate lines corresponding to memory sections in other rows are configured to provide zero voltage.