发明名称 Data forwarding circuit, data forwarding method, display device, host-side device, and electronic apparatus
摘要 The timing controller determines the number of data lanes (11, 12, 13), which are used to transfer data, based on information in relation to an amount of data to be transferred during a predetermined time period. Out of the plurality of data lanes (11, 12, 13), the determined number of data lane(s) (11, 12, 13) are used to transfer data. Further, a data lane(s) (11, 12, 13) which is not used in the data transfer is deactivated.
申请公布号 US9142195(B2) 申请公布日期 2015.09.22
申请号 US201514601466 申请日期 2015.01.21
申请人 Sharp Kabushiki Kaisha 发明人 Saitoh Kohji;Uehata Masaki;Yamato Asahi
分类号 G06F13/40;G06F3/041;G09G5/18;G09G3/36;G09G5/02 主分类号 G06F13/40
代理机构 Keating & Bennett, LLP 代理人 Keating & Bennett, LLP
主权项 1. A data transfer circuit configured to transfer data with use of at least one of a plurality of data lanes, the data transfer circuit comprising: a determining device configured to determine, based on information regarding an amount of data to be transferred during a predetermined time period, a number of data lanes via which the data is transferred; a transferring device configured to transfer the data with use of the number of data lane(s) determined by the determining device, out of the plurality of data lanes; and a deactivating device configured to deactivate a data lane(s), which is not used to transfer the data, out of the plurality of data lanes; wherein the data is indicative of an image to be displayed on a display panel; one vertical period to display the image is divided into (i) a transfer period during which the data is transferred to a receiver circuit and (ii) a halt period during which the data is not transferred to the receiver circuit; the information defines the transfer period and the halt period; the determining device is configured to set the number of data lanes to zero during the halt period; the data transfer circuit is provided in a host-side device that is connected with a display device including the display panel; and the data transfer circuit defines a graphic controller configured or programmed to transfer data, which is indicative of the image, to a timing controller included in the display device.
地址 Osaka JP