VTFT formation using selective area deposition

摘要

A method of producing a vertical transistor includes providing a conductive gate structure having a reentrant profile on a substrate. A conformal insulating material layer is formed on the conductive gate structure. A conformal semiconductor material layer is formed on the insulating material layer. A deposition inhibiting material is deposited over a portion of the substrate and the conductive gate structure including filling the reentrant profile. A portion of the deposition inhibiting material is removed without removing all of the deposition inhibiting material from the reentrant profile. A plurality of electrodes is formed by depositing an electrically conductive material layer on portions of the semiconductor material layer using a selective area deposition process in which the electrically conductive material layer is not deposited on the deposition inhibiting material remaining in the reentrant profile.

主权项

1. A method of producing a vertical transistor comprising:
providing a conductive gate structure having a reentrant profile on a substrate; forming a conformal insulating material layer on the conductive gate structure; forming a conformal semiconductor material layer on the insulating material layer; depositing a deposition inhibiting material over a portion of the substrate and the conductive gate structure including filling the reentrant profile; removing a portion of the deposition inhibiting material without removing all of the deposition inhibiting material from the reentrant profile; and forming a plurality of electrodes by depositing an electrically conductive material layer on portions of the semiconductor material layer using a selective area deposition process in which the electrically conductive material layer is not deposited on the deposition inhibiting material remaining in the reentrant profile.