发明名称 IMPROVED LOW VOLTAGE WRITE SPEED BITCELL
摘要 <p>In low power CPUs the best way to reduce power is to reduce supply voltage. Most low voltage memory arrays use an 8T cell (450) which has read stability immunity in order to operate at low voltages. An embodiment of the disclosure determines when a write wordline (WWL 410) rises. If the determination (header pFET 430) shows that the WWL has risen at least one of the plurality of p channel field effect transistors (pFETS 432 434) is disconnected from a voltage supply and the at least one plurality of n channel field effect transistors (nFET) pass gate transistors (440 442) are opened.</p>
申请公布号 IN4993CHN2014(A) 申请公布日期 2015.09.18
申请号 IN2014CH04993 申请日期 2014.07.01
申请人 QUALCOMM INCORPORATED 发明人 PUCKETT JOSHUA L.;GARG MANISH;SHANKAR HARISH
分类号 G11C11/412;G11C11/419 主分类号 G11C11/412
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