| 主权项 |
1. A nonvolatile semiconductor memory device, comprising:
a memory cell array having a plurality of NAND strings arranged therein, each of the NAND strings including a memory string having a plurality of memory cells connected in series therein and a first select transistor and a second select transistor respectively connected to both ends of the memory string; a plurality of word lines respectively connected to control gate electrodes of the plurality of memory cells; a plurality of select gate lines respectively connected to control gate electrodes of the first select transistor and the second select transistor; and a control circuit that controls data stored in the plurality of memory cells, the word line including a first word line which is connected to the memory cell configured capable of storing data of a first bit number and a second word line which is connected to the memory cell configured capable of storing data of a second bit number which is smaller than the first bit number, the control circuit being configured to store in the memory cell connected to the first word line user data capable of being arbitrarily rewritten by a user and a parity for performing error correction on the user data, and the control circuit being configured to store in the memory cell connected to the second word line not only the parity but also a first external parity for performing error correction on the user data. |
