发明名称 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
摘要 A semiconductor device includes a first chip, a second chip stacked on the first chip, and a third chip stacked on the second chip. The second chip includes a second semiconductor layer having a second circuit surface facing the first wiring layer and a second rear surface opposite to the second circuit surface, a second wiring layer provided on the second circuit surface and connected to a first wiring layer of the first chip, and a second electrode extending through the second semiconductor layer and connected to the second wiring layer. The third chip includes a third semiconductor layer having a third circuit surface and a third rear surface facing the second chip, a third wiring layer provided on the third circuit surface, and a third electrode extending through the third semiconductor layer, connected to the third wiring layer and connected to the second electrode through bumps.
申请公布号 US2015262989(A1) 申请公布日期 2015.09.17
申请号 US201414475298 申请日期 2014.09.02
申请人 Kabushiki Kaisha Toshiba 发明人 KAWASAKI Kazushige;KURITA Yoichiro
分类号 H01L25/18;H01L23/00;H01L23/31;H01L25/00;H01L21/768;H01L21/56;H01L25/065;H01L23/48;H01L21/304 主分类号 H01L25/18
代理机构 代理人
主权项 1. A semiconductor device comprising: a first chip having a first semiconductor layer including a first circuit surface and a first rear surface opposite to the first circuit surface, a first wiring layer provided on the first circuit surface, and a first through electrode extending through the first semiconductor layer and connected to the first wiring layer; a second chip stacked on the first wiring layer side of the first chip and having a second semiconductor layer having a second circuit surface facing the first wiring layer and a second rear surface opposite to the second circuit surface, a second wiring layer provided on the second circuit surface and connected to the first wiring layer of the first chip, and a second through electrode extending through the second semiconductor layer and connected to the second wiring layer; and a third chip that is stacked on the second rear surface side of the second chip, and having a third semiconductor layer having a third circuit surface and a third rear surface positioned opposite to the third circuit surface and facing the second chip, a third wiring layer provided on the third circuit surface, and a third through electrode extending through the third semiconductor layer, connected to the third wiring layer and connected to the second electrode extending through the second chip through bumps formed therebetween.
地址 Tokyo JP