STACKED SEMICONDUCTOR DEVICE

摘要

A stacked semiconductor device includes a first pair of vertically stacked self-aligned nanowires, a second pair of vertically stacked self-aligned nanowires, and a gate upon a semiconductor substrate, the gate surrounding portions of the first pair of vertically stacked self-aligned nanowires and the second pair of vertically stacked self-aligned nanowires. First epitaxy may merge the first pair of vertically stacked self-aligned nanowires and second epitaxy may merge second pair of vertically stacked self-aligned nanowires. The stacked semiconductor device may be fabricated by forming a lattice-fin upon the semiconductor substrate and the gate surrounding a portion of the lattice-fin. The vertically stacked self-aligned nanowires may be formed by selectively removing a plurality of layers from the lattice-fin.

主权项

1. A stacked semiconductor device fabrication process comprising:
forming a lattice-fin upon a semiconductor substrate; forming a gate upon the semiconductor substrate surrounding a portion of the lattice-fin; forming vertically stacked self-aligned nanowires by selectively removing a plurality of layers from the lattice-fin, and; forming first epitaxy upon sidewalls of a plurality of vertically stacked self-aligned nanowires in a first nanowire group, the first epitaxy merging the first nanowire group in source and drain regions of the stacked semiconductor device.