Method of Semiconductor Integrated Circuit Fabrication

摘要

A method of fabricating a semiconductor integrated circuit (IC) is disclosed. A conductive feature over a substrate is provided. A first dielectric layer is deposited over the conductive feature and the substrate. A via-forming-trench (VFT) is formed in the first dielectric layer to expose the conductive feature and the substrate around the conductive feature. The VFT is filled in by a sacrificial layer. A via-opening is formed in the sacrificial layer to expose the conductive feature. A metal plug is formed in the via-opening to connect to the conductive feature. The sacrificial layer is removed to form a surrounding-vacancy around metal plug and the conductive feature. A second dielectric layer is deposited over the substrate to seal a portion of the surrounding-vacancy to form an enclosure-air-gap all around the metal plug and the conductive feature.

主权项

1. A method for fabricating a semiconductor integrated circuit (IC), the method comprising:
providing a conductive feature over a substrate; depositing a first dielectric layer over the conductive feature and the substrate; forming a via-forming-trench (VFT) in the first dielectric layer to expose the conductive feature and the substrate around the conductive feature; filling in the VFT with a sacrificial layer; forming a via-opening in the sacrificial layer to expose the conductive feature; forming a metal plug in the via-opening to connect to the conductive feature; selectively removing the sacrificial layer to form a surrounding-vacancy around metal plug and the conductive feature; and depositing a second dielectric layer over the substrate to seal an upper portion of the surrounding-vacancy to form an enclosure-air-gap around the metal plug and the conductive feature.