| 摘要 |
Disclosed is a laminated semiconductor integrated circuit device, wherein a three-dimensional space for lamination is reduced with a low-cost configuration, and sufficient power supply qualities are ensured. A first semiconductor integrated circuit device is provided with: a first penetrating semiconductor region, which penetrates a first semiconductor base body in the thickness direction, and which is connected to a first power supply potential; and a second penetrating semiconductor region that is connected to a second power supply potential. A second semiconductor integrated circuit device is laminated to the first semiconductor integrated circuit device, said second semiconductor integrated circuit device having a first electrode and a second electrode that are connected to the first penetrating semiconductor region and the second penetrating semiconductor region, respectively. |
