发明名称 SEMICONDUCTOR ARRANGEMENT AND FORMATION THEREOF
摘要 A semiconductor arrangement and method of formation are provided. The semiconductor arrangement includes an interconnect which includes an interconnect metal plug surrounded by a second metal layer. The interconnect is adjacent a sidewall of a dielectric, such that an air gap is between the interconnect and the sidewall of the dielectric. A protective barrier is over the interconnect and the air gap, and is over and in direct physical contact with a top surface of the dielectric. The interconnect metal plug surrounded by the second metal layer is less susceptible to damage than an interconnect metal plug that is not surrounded by a second metal layer. The protective barrier in direct physical contact with the dielectric reduces parasitic capacitance, which reduces an RC delay of the semiconductor arrangement, as compared to a semiconductor arrangement that does not have a protective barrier in direct physical contact with a dielectric.
申请公布号 US2015262937(A1) 申请公布日期 2015.09.17
申请号 US201414208096 申请日期 2014.03.13
申请人 TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LIMITED 发明人 Liao Yu-Chieh;Chuang Cheng-Chi;Yang Tai-I;Lin Tien-Lu;Wu Yung-Hsu
分类号 H01L23/532;H01L23/00;H01L21/768 主分类号 H01L23/532
代理机构 代理人
主权项 1. A method of forming a semiconductor arrangement, comprising: forming a first metal layer in a first opening of a dielectric, a second opening of the dielectric and over the dielectric, the first metal layer comprising titanium nitride; forming a first interconnect over the first metal layer in the first opening; forming a second interconnect over the first metal layer in the second opening; forming a first dielectric layer over the first metal layer, the first interconnect and the second interconnect; performing a first etch to remove a first portion of the first dielectric layer over the first interconnect, the second interconnect and a first portion of the first metal layer and to remove the first portion of the first metal layer from a first top portion of the top surface of the dielectric, such that a first metal layer first portion remains in the first opening and a first metal layer second portion remains in the second opening; performing a second etch to form a first air gap on first side of the first metal layer first portion and to form a second air gap on a second side of the first metal layer first portion, such that the second air gap is between the first metal layer first portion and the first metal layer second portion; performing a third etch to remove first sidewalls of the first metal layer first portion, such that a first bottom portion of the first metal layer remains under the first interconnect, and to remove second sidewalls of the first metal layer second portion, such that a second bottom portion of the first metal layer remains under the second interconnect; and forming a protective barrier over the first interconnect and the second interconnect.
地址 Hsin-Chu TW