INTERRUPT SIGNAL ARBITRATION

摘要

An interrupt controller includes a priority level arbitrator (8) including multiple stages. The stages include at least one stage comprising a plurality of interrupt selectors formed of a multiplexer (14) for selecting between a pair of potentially concurrently asserted interrupt signals in dependence upon selection data. The selection data is determined in advance by a priority level comparator (12) using priority level data associated with the respective interrupt signals.

主权项

1. Apparatus for processing data comprising:
an interrupt signal receiver configured to receive a plurality of interrupt signals having respective priority levels; and a priority level arbitrator coupled to said interrupt signal receiver and configured to identify an interrupt signal having a highest priority level among interrupt signals concurrently asserted at a given time; wherein said priority level arbitrator comprises:
(i) a priority level comparator configured to generate selection data by comparing priority levels within each of a plurality of sets of interrupt signals from within said plurality of interrupt signals, said selection data representing an intra-set priority level ordering of said interrupt signals within each of said plurality of sets determined independently of assertion of any of said plurality of interrupt signals;(ii) a plurality of interrupt selectors, each of said plurality of interrupt selectors having a corresponding set within said plurality of sets and programmed with a corresponding portion of said selection data to select from among any concurrently asserted interrupt signals within said corresponding set an interrupt signal having a highest priority among said concurrently asserted interrupt signals within said corresponding set.