发明名称 |
WAFER-BASED ELECTRONIC COMPONENT PACKAGING |
摘要 |
A surface mount device includes at least one semiconductor device including an exposed top metal, an encapsulation layer partially encapsulating the at least one semiconductor device, and at least one end-termination cap on the surface mount device resulting in an electrical connection from a first side of the surface mount device to a second side of the surface mount device. In implementations, one process for fabricating the surface mount device includes dicing a finished device wafer in a scribe-line region, applying tape to a first side of the finished device wafer, backgrinding a second side of the finished device wafer, encapsulating the second side of the finished device wafer with an encapsulation layer, singulating the finished device wafer, and forming at least one wrap-around connection from a first side of the surface mount device to a second side of the surface mount device. |
申请公布号 |
US2015262944(A1) |
申请公布日期 |
2015.09.17 |
申请号 |
US201414317613 |
申请日期 |
2014.06.27 |
申请人 |
Maxim Integrated Products, Inc. |
发明人 |
Srivastava Anuranjan;Tran Khanh |
分类号 |
H01L23/00;H01L21/56 |
主分类号 |
H01L23/00 |
代理机构 |
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代理人 |
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主权项 |
1. A surface mount device, comprising:
at least one semiconductor device including an exposed top metal; an encapsulation layer partially encapsulating the at least one semiconductor device; and at least one end-termination cap on the surface mount device, the at least one end-termination cap resulting in an electrical connection from a first side of the surface mount device to a second side of the surface mount device. |
地址 |
San Jose CA US |