发明名称 D/A CONVERTER
摘要 To provide a D/A converter including a sampling circuit capable of suppressing a high-frequency component in an input signal without obstructing downsizing of electronic equipment. A D/A converter includes a first capacitative element unit including plural sampling capacitors, a second capacitative element unit including plural sampling capacitors, a first switch unit including the plural switches configured to store charges in the plural sampling capacitors of the first capacitative element unit and to transfer the charge, and a second switch unit including the plural switches configured to store charges in the plural sampling capacitors of the second capacitative element unit and to transfer the charge. The first and the second switch units operate alternately.
申请公布号 US2015263743(A1) 申请公布日期 2015.09.17
申请号 US201314432292 申请日期 2013.10.11
申请人 ASAHI KASEI MICRODEVICES CORPORATION 发明人 Nakanishi Yutaka;Nakanishi Junya
分类号 H03M1/06;H03M1/80 主分类号 H03M1/06
代理机构 代理人
主权项 1. A D/A converter comprising: a first capacitative element unit including a plurality of capacitative elements configured to store a first charge depending on a reference voltage corresponding to a first digital code; a first switching element unit including a plurality of switching elements configured to store the first charge in the plurality of capacitative elements of the first capacitative element unit, respectively, and to transfer the first charge; a second capacitative element unit including a plurality of capacitative elements configured to store a second charge depending on a reference voltage corresponding to a second digital code; a second switching element unit including a plurality of switching elements configured to store the second charge in the plurality of capacitative elements of the second capacitative element unit, respectively, and to transfer the second charge; an integral capacity element to which the first and the second charges stored in the first capacitative element unit and the second capacitative element unit are transferred; and an operational amplifier connected to the first switching element unit, wherein the first switching element unit is configured to store the first charge in the plurality of capacitative elements of the first capacitative element unit in accordance with a plurality of clock signals which are set such that sampling timings are different from each other, and the second switching element unit is configured to store the second charge in the plurality of capacitative elements of the second capacitative element unit in accordance with a plurality of clock signals which are set such that sampling timings are different from each other.
地址 Tokyo JP