Signal processing circuit, resolver digital converter, and multipath nested mirror amplifier

摘要

A signal processing circuit includes a chopper amplifier (1) that has a differential amplifier circuit (AMP1) that amplifies differential input signals Vsp(t) and Vsm(t), and an adder circuit (1B) that generates an addition signal Vfil(t) by addition of the chopper output signal Vsub(t) that the chopper amplifier (1) generates. Differential signals inputted into the differential amplifier circuit (AMP1) are interchanged for every first phase period and second phase period, and the adder circuit (1B) generates the addition signal by addition of the chopper output signal in the first phase period and in the second phase period.