半导体储存装置;SEMICONDUCTOR STORAGE DEVICE

摘要

本发明提供一种半导体储存装置可抑制记忆体单元的临界值的变动。本发明之快闪记忆体之编程方法的步骤包括：根据编程资料将位元线设置为编程用的电压或编程禁止用的电压、施加编程脉冲至所选择的页面、及对所选择页面的编程进行验证。此外，其步骤更包括：当验证结果系为具有从合格变为不合格之一不合格偏移记忆体单元时，将上述不合格偏移记忆体单元的上述位元线电压设定为一缓和电压以缓和下一个编程脉冲的电压。; applying a program pulse to the selected page; and verifying the programing of the selected page. Also, the steps further include: when the verification result shows there is a passed memory becoming a failed shift memory, setting the voltage of the bit line of the failed shift memory to a mitigation voltage for mitigating the voltage of the next program pulse.