| 摘要 |
<p>The present invention relates to a semiconductor memory device performing a refresh operation. The semiconductor memory device comprises: an address latching unit for latching an address to be consecutively accessed when an active operation is performed; an address comparing unit for generating a comparison result signal by comparing the address latched in the address latching unit with a previous latched address; a refresh controlling unit for controlling a normal refresh operation and a smart refresh operation status in response to a refresh command signal and the comparison result signal; and a refresh operating unit for comprising a plurality of memory cells corresponding to each of the addresses, and performing the normal refresh operation and the smart refresh operation.</p> |
