发明名称 |
RESISTANCE-BASED MEMORY WITH REDUCED VOLTAGE INPUT/OUTPUT DEVICE |
摘要 |
A resistance-based memory with a reduced voltage I/O device is disclosed. In a particular embodiment, a circuit includes a data path including a first resistive memory cell and a first load transistor. A reference path includes a second resistive memory cell and a second load transistor. The first load transistor and the second load transistor are input and output (I/O) transistors adapted to operate at a load supply voltage similar to a core supply voltage of a core transistor within the circuit. |
申请公布号 |
EP2526553(B1) |
申请公布日期 |
2015.09.16 |
申请号 |
EP20110702551 |
申请日期 |
2011.01.21 |
申请人 |
QUALCOMM INCORPORATED |
发明人 |
JUNG, SEONG-OOK;KIM, JISU;KANG, SEUNG, H. |
分类号 |
G11C11/16 |
主分类号 |
G11C11/16 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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