发明名称 SCALABLE SERIAL/DE-SERIAL I/O FOR CHIP-TO-CHIP CONNECTION BASED ON MULTI-FREQUENCY QAM SCHEME
摘要 A serializer and de-serializer circuit which is particularly well-suited for use in communicating digital data from one integrated circuit (chip) to another for implementing chip-to-chip communications is presented. The circuits are scalable and utilize a multi-frequency quadrature amplitude modulation (QAM) mechanism for converting digital data bits from a parallel form into a serial analog stream for communication over a chip I/O connection. The serializer has multiple digital-to-analog converters (DACs) whose outputs are directed to QAM mixer inputs, within QAMs at multiple frequencies, whose outputs are summed into a single analog signal for communication over an I/O connection. The de-serializer amplifies the analog signal which is received by QAM mixers at different frequencies, whose outputs are low pass filtered and converted back to parallel digital data bits.
申请公布号 EP2918015(A1) 申请公布日期 2015.09.16
申请号 EP20130853023 申请日期 2013.10.22
申请人 THE REGENTS OF THE UNIVERSITY OF CALIFORNIA 发明人 LEE, SHEAU JIUNG;CHANG, MAU-CHUNG FRANK;KIM, YANGHYO
分类号 H03M9/00;H03M1/66;H04L27/00;H04L27/36;H04L27/38 主分类号 H03M9/00
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