发明名称 Process for fabricating a three-dimensional integrated structure with improved heat dissipation, and corresponding three-dimensional integrated structure
摘要 A three-dimensional integrated structure includes a first integrated circuit having a substrate assembled in an interlocking manner with a second integrated circuit having a substrate. The substrate of the first integrated circuit comprises first pores separated by first partitions, and the substrate of the second integrated circuit comprises second pores separated by second partitions. The first partitions interlock with the second pores and the second partitions interlock with the first pores so as to define at least one region bounded by the two substrates. A phase-change material is retained within the at least one region.
申请公布号 US9136233(B2) 申请公布日期 2015.09.15
申请号 US201414293341 申请日期 2014.06.02
申请人 STMicroelctronis (Crolles 2) SAS 发明人 Chapelon Laurent-Luc
分类号 H01L29/06;H01L21/30;H01L23/00;H01L23/427;H01L25/065;H01L25/00;H01L23/13;H01L23/31;H01L23/498 主分类号 H01L29/06
代理机构 Gardere Wynne Sewell LLP 代理人 Gardere Wynne Sewell LLP
主权项 1. A process for fabricating a three-dimensional integrated structure, comprising: forming first pores separated by first partitions in a substrate of a first integrated circuit; forming second pores separated by second partitions in a substrate of a second integrated circuit; wherein the first partitions are configured to interlock with the second pores and the second partitions are configured to interlock with the first pores; at least partially filling the second pores with a phase-change material configured for liquefying in the temperature ranges corresponding to the operating temperature of the first and second integrated circuits; assembling the substrate of the first integrated circuit with the substrate of the second integrated circuit so as to form at least one region bounded by said two substrates, defined by the interlock and retaining said phase-change material.
地址 Crolles FR