发明名称 |
Semiconductor device including memory capable of reducing power consumption |
摘要 |
A semiconductor device includes a plurality of memory arrays and a plurality of memory array control circuits. Each of the plurality of memory array control circuits includes a read/write control circuit for controlling a read/write operation for the memory array, and a selection circuit for selecting and activating the memory array based on a clock signal and an output signal from the read/write control circuit. |
申请公布号 |
US9135966(B2) |
申请公布日期 |
2015.09.15 |
申请号 |
US201213566779 |
申请日期 |
2012.08.03 |
申请人 |
RENESAS ELECTRONICS CORPORATION |
发明人 |
Iwamoto Hisashi;Yano Yuji;Inoue Kazunari |
分类号 |
G11C7/00;G11C7/22;G11C7/10 |
主分类号 |
G11C7/00 |
代理机构 |
McDermott Will & Emery LLP |
代理人 |
McDermott Will & Emery LLP |
主权项 |
1. A semiconductor device comprising:
a plurality of memory arrays, and a plurality of memory array control circuits, each of said plurality of memory array control circuits including: a read/write control circuit for controlling a read/write operation to the memory array, and a selection circuit for selecting and activating the memory array based on a clock signal and an output signal from said read/write control circuit, wherein said read/write control circuit includes: a counter for incrementing a count number when a write command is inputted, and decrementing said count number when a read command is inputted, and a determination circuit for determining whether or not effective data exists in said memory array, based on said count number of said counter. |
地址 |
Kanagawa JP |