发明名称 Multiple graphics processing unit display synchronization system and method
摘要 Systems and methods for utilizing multiple graphics processing units for controlling presentations on a display are presented. In one embodiment, a dual graphics processing system includes a first graphics processing unit for processing graphics information; a second graphics processing unit for processing graphics information; a component for synchronizing transmission of display component information from the first graphics processing unit and the second graphics processing unit and a component for controlling switching between said first graphics processing unit and said second graphics processing unit. In one embodiment, the component for synchronizing transmission of display component information adjusts (e.g., delays, speeds up, etc.) the occurrence or duration of a corresponding graphics presentation characteristic (e.g., end of frame, end of line, vertical blanking period, horizontal blanking period, etc.) in signals from multiple graphics processing units.
申请公布号 US9135675(B2) 申请公布日期 2015.09.15
申请号 US200912484954 申请日期 2009.06.15
申请人 NVIDIA CORPORATION 发明人 Wyatt David;Modi Manish
分类号 G06F15/80;G06F15/00;G06F15/16;G06T3/00;G06F3/14;G09G5/12 主分类号 G06F15/80
代理机构 代理人
主权项 1. A graphics processing system comprising: a hardware component for transmitting display component information; a component for adjusting transmission timing of display component information from a first stream of display signals and a second stream of display signals within a synchronization tolerance, wherein said adjusting includes an adjustment to a duration of a timing factor included in a transmission signal of said display component information; wherein a first pixel source provides said first stream of display signals and a second pixel source provides said second stream of display signals, and wherein said transmission timing adjustment comprises: a simulation of a generator locking (genlock) function that is performed independently in relation to a genlock hardware component; and at least one of: sliding a timing alignment of said first pixel source to match a timing alignment of said second pixel source; or sliding said timing alignment of said second pixel source to match said timing alignment of said first pixel source; and a component for switching between said first stream of display signals and said second stream of display signals upon said performance of said transmission timing adjustment; and wherein upon said switching, an independent timing of said first pixel source and said second pixel source is restored.
地址 Santa Clara CA US