SOI substrate, method of manufacturing the SOI substrate, semiconductor device, and method of manufacturing the semiconductor device

摘要

An SOI substrate includes a semiconductor base; a semiconductor layer formed over the semiconductor base; and a buried insulating film which is disposed between the semiconductor base and the semiconductor layer, so as to electrically isolate the semiconductor layer from the semiconductor base, where the buried insulating film contains a nitride film.

主权项

1. A semiconductor device comprising:
an SOI substrate; and a semiconductor element structure formed on the SOI substrate, the SOI substrate including: a semiconductor base; a semiconductor layer formed over the semiconductor base; and a buried insulating film which is disposed between the semiconductor base and the semiconductor layer, so as to electrically isolate the semiconductor layer from the semiconductor base, the buried insulating film containing a lower insulating film formed on the semiconductor base, a nitride film formed on the lower insulating film, and an upper insulating film formed on the nitride film, the semiconductor element structure including: a gate structure having a gate insulating film formed on the semiconductor layer and a gate electrode formed on the gate insulating film; an insulating interlayer which is formed on the semiconductor layer of the SOI substrate and on the gate structure and has a contact hole formed therein; and a contact plug with which the contact hole is filled, the contact plug being electrically connected to the semiconductor layer, and the semiconductor layer including: first and second impurity-diffused regions which have a same conductivity type and are formed on both sides of the gate structure, respectively; and a body region which is formed between the first and second impurity-diffused regions and directly under the gate structure; and wherein, either one of the first and second impurity-diffused regions is electrically connected to the contact plug, and a bias voltage is applied to the semiconductor base when the semiconductor base is used as a back-gate.