发明名称 |
Flash memory apparatus and data reading method thereof |
摘要 |
A flash memory apparatus and a data reading method thereof are provided. A boost voltage greater than a pre-charge voltage is provided to a gate of a source discharge transistor when a data reading operation is performed on a memory unit, so as to enhance discharge capability of the source discharge transistor. |
申请公布号 |
US9136008(B1) |
申请公布日期 |
2015.09.15 |
申请号 |
US201414320664 |
申请日期 |
2014.07.01 |
申请人 |
Winbond Electronics Corp. |
发明人 |
Yeh Jun-Lin;Chang Shang-Wen |
分类号 |
G11C16/06;G11C5/06;G11C16/30;G11C5/14;G11C16/26;G11C16/24;G11C16/04 |
主分类号 |
G11C16/06 |
代理机构 |
Jianq Chyun IP Office |
代理人 |
Jianq Chyun IP Office |
主权项 |
1. A flash memory apparatus, comprising:
a memory unit, comprising a plurality of memory cells; a source discharge transistor, having a drain coupled to sources of the memory cells and having a source coupled to a ground; a pre-charge unit, coupled to a gate of the source discharge transistor and controlled by a pre-charge control signal to stop providing a pre-charge voltage to the gate of the source discharge transistor when the memory unit performs a data reading operation; a boost unit, coupled to the gate of the source discharge transistor and providing a boost voltage to the gate of the source discharge transistor according to a boost voltage control signal after the pre-charge unit stops providing the pre-charge voltage, wherein a level of the boost voltage is greater than a level of the pre-charge voltage; and a control unit, coupled to the pre-charge unit and the boost unit and sending the pre-charge control signal and the boost voltage control signal according to a read command. |
地址 |
Taichung TW |