发明名称 PHASE-LOCKED LOOP CIRCUIT INCLUDING VOLTAGE DOWN CONVERTER HAVING PASSIVE ELEMENT
摘要 A phase-locked loop circuit includes a first circuit, a second circuit, and a voltage down converter. The first circuit uses a first power voltage and generates a first signal based on a reference signal and a feedback signal. The second circuit uses a second power voltage which is lower than the first power voltage, generates an oscillation signal based on the second signal, and divides the oscillation signal to generate a feedback signal. The voltage down converter is combined between the first circuit and the second circuit, drops the activation voltage level of the first signal, converts it into a second signal, and is a passive device.
申请公布号 KR20150103814(A) 申请公布日期 2015.09.14
申请号 KR20140025302 申请日期 2014.03.04
申请人 SAMSUNG ELECTRONICS CO., LTD. 发明人 KANG, HEE CHAI
分类号 H03L7/07;H03L7/08 主分类号 H03L7/07
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