| 摘要 |
A method for preparing a multilayer superfine silicon line, comprising: preparing an etching masking layer of silicon; forming a fin and source/drain region on both ends thereof by epitaxy; and forming a multilayer superfine silicon line. The method has the following advantages: the atom layer deposition accurately defines the position of the superfine line, giving good controllability; the anisotropic etching of the silicon is automatically stopped, so the process window is large, and the cross section of a nanowire obtained via etching is uniform and flat; a method of mask preparation before channel epitaxy is employed to provide a simple process of forming a multilayer sidewall etching mask, i.e., the multilayer sidewall mask is obtained by etching an epitaxial window only once irrespective of the number of masking layers; a line having a size less than 10 nm can be prepared in conjunction with oxidation technology, thus satisfying the requirement of the key process of a small-sized device. Polycrystalline silicon can be etched by employing a TMAH solution wet process, being simple, convenient and safe, without introducing metal, thus being suitable for the manufacturing process of an integrated circuit; and the method is completely compatible with a bulk silicon planar transistor process, thus having small process costs. |
