SHIFT REGISTER UNIT AND GATE DRIVER CIRCUIT

摘要

Provided are a shift register unit and a gate driver circuit, which are configured to suppress output errors caused by the drifts in the threshold voltages and the interval existed in the operation of pulling the output terminal, and thus to enhance stability of the shift register unit. The shift register unit comprises: an input module, a first output module, a pull-down driving module, a pull-down module and a first output discharging unit. The pull-down driving module is connected to the first clock signal input terminal and the second clock signal input terminal, and configured to provide the first clock signal to a first pull-down node in response to the first clock signal, provide the second clock signal to a second pull-down node in response to the second clock signal, provide a first low voltage signal to the first pull-down node and the second pull-down node in response to the voltage signal at the pull-up node, provide the first low voltage signal to the second pull-down node in response to a voltage signal at the first pull-down node, and provide the first low voltage signal to the first pull-down node in response to a voltage signal at the second pull-down node.

主权项

1. A shift register unit comprising:
an input module connected to an input signal terminal and a first clock signal input terminal of the shift register unit and configured to provide an input signal to a pull-up node in response to the input signal and a first clock signal; a first output module connected to a second clock signal input terminal and configured to provide a second clock signal to a first output terminal of the shift register unit in response to a voltage signal at the pull-up node; a pull-down driving module connected to the first clock signal input terminal and the second clock signal input terminal, and configured to provide the first clock signal to a first pull-down node in response to the first clock signal, provide the second clock signal to a second pull-down node in response to the second clock signal, provide a first low voltage signal to the first pull-down node and the second pull-down node in response to the voltage signal at the pull-up node, provide the first low voltage signal to the second pull-down node in response to a voltage signal at the first pull-down node, and provide the first low voltage signal to the first pull-down node in response to a voltage signal at the second pull-down node; a pull-down module configured to provide the first low voltage signal to the pull-up node in response to the voltage signal at the first pull-down node and the voltage signal at the second pull-down node; a first output discharging unit configured to provide a second low voltage signal to the first output terminal of the shift register unit in response to the voltage signal at the first pull-down node and the voltage signal at the second pull-down node, wherein the pull-up node is a connected point of the input module and the first output module, the first pull-down node and the second pull-down node are both connection points of the pull-down driving module and the pull-down module, and the first low voltage signal is less than or equal to the second low voltage signal.