| 发明名称 |
DATA PROCESSING APPARATUS FOR PIPELINE EXECUTION ACCELERATION AND METHOD THEREOF |
| 摘要 |
Disclosed herein are a data processing apparatus for pipeline execution acceleration and a method thereof. According to an exemplary embodiment of the present invention, the data processing apparatus for pipeline execution acceleration includes: a processor configured to sequentially execute a first application program and a second application program reading or writing a specific file; and a file system configured to complete a write for a file data for the specific file to a data block previously allocated from the first application program and provide the file data for the specific file to the second application program prior to executing a close call for the specific file from the first application program, when executing a read call for the specific file from the second application program. |
| 申请公布号 |
US2015254116(A1) |
申请公布日期 |
2015.09.10 |
| 申请号 |
US201514616894 |
申请日期 |
2015.02.09 |
| 申请人 |
Electronics and Telecommunications Research Institute |
发明人 |
KIM Kang-Ho;KOH Kwang-Won;JEON Seung-Hyub |
| 分类号 |
G06F9/54 |
主分类号 |
G06F9/54 |
| 代理机构 |
|
代理人 |
|
| 主权项 |
1. A data processing apparatus for pipeline execution acceleration, comprising:
a processor configured to sequentially execute a first application program and a second application program reading or writing a specific file; and a file system configured to complete a write for a file data for the specific file to a data block previously allocated from the first application program and provide the file data for the specific file to the second application program prior to executing a close call for the specific file from the first application program, when executing a read call for the specific file from the second application program. |
| 地址 |
Daejeon KR |
