| 发明名称 |
DIGITAL EXTRACTION AND CORRECTION OF THE LINEARITY OF A RESIDUE AMPLIFIER IN A PIPELINE ADC |
| 摘要 |
Embodiments of a pipeline analog-to-digital converter is provided. In accordance with some embodiments, a pipeline analog-to-digital converter includes a stage, the stage including a residue amplifier that amplifies a residual voltage generated by the stage to obtain an amplified residual voltage; a backend digitizer that digitizes the amplified residual voltage to generate a digitized residual; and a digital correction circuit that corrects the digitized residual according to which zone the digitized residual is found. |
| 申请公布号 |
US2015256189(A1) |
申请公布日期 |
2015.09.10 |
| 申请号 |
US201414201624 |
申请日期 |
2014.03.07 |
| 申请人 |
Integrated Device Technology, Inc. |
发明人 |
Marie Herve;Biallais Arnaud |
| 分类号 |
H03M1/00;H03M1/18 |
主分类号 |
H03M1/00 |
| 代理机构 |
|
代理人 |
|
| 主权项 |
1. A pipeline analog-to-digital converter, comprising:
a stage, the stage including a residue amplifier that amplifies a residual voltage generated by the stage to obtain an amplified residual voltage; a backend digitizer that digitizes the amplified residual voltage to generate a digitized residual; and a digital correction circuit that corrects the digitized residual according to which zone the digitized residual is found. |
| 地址 |
San Jose CA US |
