发明名称 COMPLEMENTARY METAL-OXIDE-SEMICONDUCTOR STRUCTURE WITH III-V AND SILICON GERMANIUM TRANSISTORS ON INSULATOR
摘要 Embodiments for the present invention provide a CMOS structure and methods for fabrication. In an embodiment of the present invention, a CMOS structure comprises a NFET, formed on a wafer, having a gate stack and a channel. A PFET having a gate stack and a channel is also formed on the wafer. The channel of the PFET and the channel of the NFET include semiconductor material formed on III-V semiconductor material, such that the III-V semiconductor material acts like a buried oxide because of a valence band offset between the semiconductor material and the III-V material. There is a height difference between a terminal of the NFET and a terminal of the PFET. In addition, the gate stack NFET is the same height as the gate stack PFET.
申请公布号 US2015255460(A1) 申请公布日期 2015.09.10
申请号 US201414199268 申请日期 2014.03.06
申请人 International Business Machines Corporation 发明人 Cheng Cheng-wei;Majumdar Amlan;Shiu Kuen-Ting
分类号 H01L27/092;H01L29/20;H01L27/12;H01L21/84;H01L29/08 主分类号 H01L27/092
代理机构 代理人
主权项 1. A CMOS structure comprising: a NFET, formed on a wafer, having a gate stack and a channel; a PFET, formed on the wafer, having a gate stack and a channel; wherein the channel of the PFET and the channel of the NFET include semiconductor material formed on III-V semiconductor material, such that the III-V semiconductor material acts like a buried oxide because of a valence band offset between the semiconductor material and the III-V material; wherein there is a height difference between a terminal of the NFET and a terminal of the PFET; and the gate stack NFET is the same height as the gate stack PFET.
地址 Armonk NY US