主权项 |
1. A circuit with a single capacitor and multiple outputs, comprising:
−AVDDL, AVDDH, 6 switches S1-S6, 3 capacitors C1-C3, and 2 Loads; wherein AVDDL is grounded on one side and coupled to S1 on the other; S1 is coupled to S2, S3 and C1 on one side and to AVDDH and S5 on the other; C1 is coupled to S1, S2, and S3 from one side and to S4, S5 and S6 on the other; S2 is coupled to −AVDDL and S4 on one side and S1, S3 and C1 on the other; −AVDDL is coupled to S2 and S4 on one side and grounded on the other; S3 is coupled to S1, S2 and C1 on one side and C2 and Load 1 on the other; S4 is coupled to S2 and −AVDDL and S5, S6 and C1 on the other side; S1 is coupled S1 and AVDDL and, on the other side, S4, S6 and C1; S3 is coupled to S1, S2 and C1 on one side and C2 and Load 1 on the other; S6 is coupled to S4, S5 and C1 on one side and C2 and Load 2 on the other; C2 is coupled to S6 and Load 2 on one side and on the other side to Ground; C3 is coupled to S3 and Load 1 on one side and on the other side to Ground; Load 1 is coupled to ground on one side and S3 and C3 on the other side; and Load 2 is coupled to ground on one side and S6 and C2 on the other side. |