TECHNOLOGIES FOR CONFIGURING TRANSMITTER EQUALIZATION IN A COMMUNICATION SYSTEM

摘要

Technologies for transmitter equalization in a communication system include reading local transmitter equalization settings from a transmitter equalization register of a first communication device and writing the local transmitter equalization settings to a transmitter equalization register of a second communication device communicatively coupled with the first communication device via a chip-to-chip communication link. Additionally, requested transmitter equalization settings may be read from the transmitter equalization register of the second communication device and written to the transmitter equalization register of the first communication device. The reading and writing process may be repeated for the opposite communication direction and for other communication lane interfaces of the first and second communication devices.

主权项

1. A station management entity to:
read, over a management data input/output (MDIO) bus established between the station management entity and a plurality of communication devices, a pre-cursor local value from a pre-cursor local setting register bank of a first transmitter equalization register of a first communication lane interface of a first communication device; read, over the MDIO bus, a post-cursor local value from a post-cursor local setting register bank of the first transmitter equalization register of the first communication lane interface of the first communication device; write, over the MDIO bus, the pre-cursor local value to a pre-cursor remote setting register bank of a first transmitter equalization register of a first communication lane interface of a second communication device; write, over the MDIO bus, the post-cursor local value to a post-cursor remote setting register bank of the first transmitter equalization register of the first communication lane interface of the second communication device; read, over the MDIO bus, a pre-cursor requested value from a pre-cursor request setting register bank of the first transmitter equalization register of the first communication lane interface of the second communication device; read, and over the MDIO bus, a post-cursor requested value from a post-cursor request setting register bank of the first transmitter equalization register of the first communication lane interface of the second communication device; read, over the MDIO bus, a request flag from the first transmitter equalization register of the first communication lane interface of the second communication device; write, over the MDIO bus, the pre-cursor requested value to the pre-cursor local setting register bank of the first transmitter equalization register of the first communication lane interface of the first communication device in response to the request flag being true; and write, over the MDIO bus, the post-cursor requested value to the post-cursor local setting register bank of the first transmitter equalization register of the first communication lane interface of the first communication device in response to the request flag being true.