| 主权项 |
1. A semiconductor device comprising:
a clock division block suitable for dividing a frequency of a source clock at a preset rate, and generating first and second internal clocks, which have a first phase difference from each other; a strobe division block suitable for dividing a frequency of a strobe signal at the preset rate, and generating first and second internal strobe signals, which have a second phase difference from each other; and a phase difference detection block suitable for generating and alternately outputting first and second detection information as detection result information, wherein the first detection information represents a combination of logic values of the first and second internal clocks detected at an edge of the first internal strobe signal, and wherein the second detection information represent a combination of logic values of the first and second internal clocks detected at an edge of the second internal strobe signal. |
