发明名称 Circuit architecture for I/Q mismatch mitigation in direct conversion
摘要 <p>An electrical circuit includes a local oscillator configured to generate a first reference signal and a second reference signal having a predetermined phase shift with the first reference signal, an I-channel mixer configured to inject the first reference signal to an incoming signal and generate a first output, a compensation mixer configured to multiply the first output with a constant factor to generate a second output, a first low pass filter configured to approximately attenuate frequencies in the second output to generate a third output, and a first correcting filter configured to filter the third output to generate a fourth output. The first correcting filter is configured to reduce a channel impulse response mismatch between the first low pass filter and a second low pass filter, which is configured to attenuate frequencies in a Q-channel of the incoming signal. In specific embodiments, the phase shift includes 45°.</p>
申请公布号 EP2779435(B1) 申请公布日期 2015.09.09
申请号 EP20140156857 申请日期 2014.02.26
申请人 ANALOG DEVICES GLOBAL 发明人 STEIN, YOSEF;PRIMO, HAIM
分类号 H03D3/00;H03D7/16;H04L25/03;H04L27/38 主分类号 H03D3/00
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