发明名称 |
Nonvolatile memory device and method of fabricating the same |
摘要 |
This technology relates to a nonvolatile memory device and a method of fabricating the same. The nonvolatile memory device may include a pipe connection gate electrode configured to have a bottom buried in a groove formed in a substrate, one or more pipe channel layers formed within the pipe connection gate electrode, pairs of main channel layers each coupled to the pipe channel layer and extended in a direction substantially perpendicular to the substrate, and a plurality of interlayer insulating layers and a plurality of cell gate electrodes alternately stacked along the main channel layers, wherein the pipe connection gate electrode includes a metal silicide layer formed within the groove. The electric resistance of the pipe connection gate electrode may be greatly reduced without an increase in a substantial height by forming the metal silicide layer buried in the substrate under the pipe connection gate electrode. |
申请公布号 |
US9130053(B2) |
申请公布日期 |
2015.09.08 |
申请号 |
US201213718388 |
申请日期 |
2012.12.18 |
申请人 |
SK Hynix Inc. |
发明人 |
Kim Min-Soo;Lee Young-Jin;Choi Jin-Hae;Han Joo-Hee;Whang Sung-Jin;Lee Byung-Ho |
分类号 |
H01L29/792;H01L29/66;H01L27/115 |
主分类号 |
H01L29/792 |
代理机构 |
IP & T Group LLP |
代理人 |
IP & T Group LLP |
主权项 |
1. A nonvolatile memory device, comprising:
a pipe connection gate electrode having a bottom in a groove buried in a substrate; one or more pipe channel layers formed within the pipe connection gate electrode; pairs of main channel layers each coupled to the pipe channel layer and extended in a direction substantially perpendicular to the substrate; and a plurality of interlayer insulating layers and a plurality of cell gate electrodes alternately stacked along the main channel layers, wherein the pipe connection gate electrode comprises a metal silicide layer formed within the groove, wherein the nonvolatile memory device includes a three-dimensional (3-D) structure, wherein the pipe connection gate electrode comprises a second conductive layer for a gate electrode configured to be in contact with a top of the pipe channel layer, wherein the pipe connection gate electrode comprises the metal silicide layer over the substrate, a first conductive layer over the metal silicide layer, and the second conductive layer over the first conductive layer. |
地址 |
Gyeonggi-do KR |