Semiconductor device including semiconductor layer over insulating layer and manufacturing method thereof

摘要

A semiconductor device having a highly responsive thin film transistor (TFT) with low subthreshold swing and suppressed decrease in the on-state current and a manufacturing method thereof are demonstrated. The TFT of the present invention is characterized by its semiconductor layer where the thickness of the source region or the drain region is larger than that of the channel formation region. Manufacture of the TFT is readily achieved by the formation of an amorphous semiconductor layer on a projection portion and a depression portion, which is followed by subjecting the melting process of the semiconductor layer, resulting in the formation of a crystalline semiconductor layer having different thicknesses. Selective addition of impurity to the thick portion of the semiconductor layer provides a semiconductor layer in which the channel formation region is thinner than the source or drain region.

主权项

1. A semiconductor device comprising:
a substrate; an insulating layer over the substrate; a semiconductor layer crossing over the insulating layer so as to cover two opposite side surfaces of the insulating layer, a top surface of the insulating layer between the two opposite side surfaces, and a first region and a second region of a top surface of the substrate, the first region and the second region being separated by the insulating layer; a gate insulating layer over the semiconductor layer; and a conductive layer over the gate insulating layer, wherein the conductive layer overlaps with a portion of the semiconductor layer that covers the top surface of the insulating layer between the two opposite side surfaces and is insulated from the semiconductor layer by the gate insulating layer, wherein a top surface of the semiconductor layer comprises a first region and a second region overlapping respectively with the first region and the second region of the top surface of the substrate, and wherein the top surface of the semiconductor layer is approximately planarized from and including the first region to the second region of the top surface of the semiconductor layer.