发明名称 Method and structure for integrating capacitor-less memory cell with logic
摘要 Methods for fabricating integrated circuits include fabricating a logic device on a substrate, forming an intermediate semiconductor substrate on a surface of the logic device, and fabricating a capacitor-less memory cell on the intermediate semiconductor substrate. Integrated circuits with capacitor-less memory cells formed on a surface of a logic device are also disclosed, as are multi-core microprocessors including such integrated circuits.
申请公布号 US9129848(B2) 申请公布日期 2015.09.08
申请号 US201314048249 申请日期 2013.10.08
申请人 Micron Technology, Inc. 发明人 Sandhu Gurtej S.
分类号 H01L21/8238;H01L27/108;H01L21/84;H01L27/105;H01L27/12;H01L27/06 主分类号 H01L21/8238
代理机构 Wells St. John, P.S. 代理人 Wells St. John, P.S.
主权项 1. A method for fabricating an integrated circuit, comprising: fabricating a wafer to comprise logic circuitry devices, the fabricated wafer having an outer surface; disposing a semiconductor material onto the outer surface of the wafer elevationally outward of the logic circuitry devices; and fabricating at least one capacitor-less memory cell on the semiconductor material elevationally outward of the logic circuitry devices after disposing the semiconductor material onto the outer surface of the wafer elevationally outward of the logic circuitry devices.
地址 Boise ID US