发明名称 |
Semiconductor device and driving method thereof |
摘要 |
A semiconductor device in which a nonvolatile memory can normally operate and power saving can be performed with a P-state function, and a driving method of the semiconductor device are provided. The semiconductor device includes: a first circuit configured to control a state including a driving voltage and a clock frequency of a processor core; a first memory circuit and a second memory circuit which store state data; a second circuit generating a power supply voltage and a third circuit generating a clock which are electrically connected to the first circuit; and the processor core electrically connected to the second circuit and the third circuit through a switch. The processor cores includes: a volatile memory; and a nonvolatile memory transmitting and receiving data to/from the first memory. |
申请公布号 |
US9129667(B2) |
申请公布日期 |
2015.09.08 |
申请号 |
US201313900140 |
申请日期 |
2013.05.22 |
申请人 |
Semiconductor Energy Laboratory Co., Ltd. |
发明人 |
Takahashi Yasuyuki;Yoneda Seiichi |
分类号 |
G11C7/00;G11C7/22;G11C11/00 |
主分类号 |
G11C7/00 |
代理机构 |
Fish & Richardson P.C. |
代理人 |
Fish & Richardson P.C. |
主权项 |
1. A semiconductor device comprising:
a first circuit configured to control a state including a driving voltage and a clock frequency of a processor core; a first memory circuit and a second memory circuit which store state data; a second circuit generating a power supply voltage and a third circuit generating a clock, the second circuit and the third circuit being electrically connected to the first circuit; and the processor core electrically connected to the second circuit and the third circuit through a switch, wherein the processor cores comprises:
a first memory; anda second memory transmitting and receiving data to/from the first memory; and wherein the first circuit reads state data stored in the first memory circuit and determines whether data in processing in the processor core is stored with a current state data when the first circuit receives an instruction for an off operation. |
地址 |
Atsugi-shi, Kanagawa-ken JP |