| 发明名称 | Semiconductor device and method of manufacturing semiconductor device | ||
| 摘要 | A semiconductor device, includes a semiconductor substrate, a first interconnect layer formed over the semiconductor substrate, a gate electrode formed in the first interconnect layer, a gate insulating film formed over the gate electrode, a second interconnect layer formed over the gate insulating film, an oxide semiconductor layer formed in the second interconnect layer, and a via formed in the second interconnect layer and connected to the oxide semiconductor layer. The gate electrode, the gate insulating film and the oxide semiconductor layer overlap in a plan view. | ||
| 申请公布号 | US9129937(B2) | 申请公布日期 | 2015.09.08 |
| 申请号 | US201313745291 | 申请日期 | 2013.01.18 |
| 申请人 | Renesas Electronics Corporation | 发明人 | Hayashi Yoshihiro;Inoue Naoya;Kaneko Kishou |
| 分类号 | H01L29/12;H01L29/41;H01L21/28;H01L27/12;H01L29/423;H01L29/792;H01L29/24 | 主分类号 | H01L29/12 |
| 代理机构 | McGinn IP Law Gorup, PLLC | 代理人 | McGinn IP Law Gorup, PLLC |
| 主权项 | 1. A semiconductor device, comprising: a semiconductor substrate; a first interconnect layer formed over the semiconductor substrate; a gate electrode formed in the first interconnect layer; a gate insulating film formed over the gate electrode; a second interconnect layer formed over the gate insulating film; an oxide semiconductor layer formed in the second interconnect layer; and a via formed in the second interconnect layer and connected to the oxide semiconductor layer; wherein the gate electrode, the gate insulating film and the oxide semiconductor layer overlap in a plan view; wherein said oxide semiconductor layer includes a channel region formed in said oxide semiconductor layer; wherein a trapping film is positioned over said oxide semiconductor layer; and wherein a back-gate electrode is positioned over said trapping film, and overlaps with said channel region in a plan view. | ||
| 地址 | Kawasaki-shi, Kanagawa JP | ||