Memory cells, memory arrays, methods of forming memory cells, and methods of forming a shared doped semiconductor region of a vertically oriented thyristor and a vertically oriented access transistor

摘要

A memory cell includes a thyristor having a plurality of alternately doped, vertically superposed semiconductor regions; a vertically oriented access transistor having an access gate; and a control gate operatively laterally adjacent one of the alternately doped, vertically superposed semiconductor regions. The control gate is spaced laterally of the access gate. Other embodiments are disclosed, including methods of forming memory cells and methods of forming a shared doped semiconductor region of a vertically oriented thyristor and a vertically oriented access transistor.

主权项

1. A method of forming a vertically oriented thyristor and a control gate operatively laterally adjacent thereto and of forming a vertically oriented access transistor which shares a doped semiconductor region with the thyristor, the method comprising:
forming a general U-shape of semiconductor material in lateral cross section, the general U-shape having a pair of vertical stems having a base extending laterally there-between in the lateral cross section; forming at least one of an access gate for the access transistor and the control gate for the thyristor within the general U-shape between the stems; and after forming the at least one of the access gate and the control gate, doping the base between the stems with a conductivity modifying impurity of at least one of n type and p type and forming the shared doped semiconductor region there-from.