发明名称 Method of making a gate structure
摘要 A method of making a gate structure includes forming a trench in a dielectric layer. The method further includes forming a gate dielectric layer in the trench. The gate dielectric layer defines an opening in the dielectric layer. The method includes forming a gate electrode in the opening. Forming the gate electrode includes filling a width of a bottom portion of the opening with a first metal material. The first metal material has a recess. Forming the gate electrode includes filling an entire width of a top portion of the opening with a homogeneous second metal material. The homogeneous second metal material has a protrusion extending into the recess, and a maximum width of the homogeneous second metal material is equal to a maximum width of the first metal material. A top surface of the gate dielectric layer is co-planar with a top surface of the homogeneous second metal material.
申请公布号 US9129953(B2) 申请公布日期 2015.09.08
申请号 US201414300867 申请日期 2014.06.10
申请人 TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD. 发明人 Lim Peng-Soon;Lee Da-Yuan;Hsu Kuang-Yuan
分类号 H01L21/3205;H01L29/49;H01L29/66;H01L21/8238;H01L29/51 主分类号 H01L21/3205
代理机构 Lowe Hauptman & Ham, LLP 代理人 Lowe Hauptman & Ham, LLP
主权项 1. A method of making a gate structure, the method comprising: forming a trench in a dielectric layer; forming a gate dielectric layer in the trench, wherein the gate dielectric layer defines an opening in the dielectric layer; and forming a gate electrode in the opening, wherein forming the gate electrode comprises: filling a width of a bottom portion of the opening with a first metal material having a first resistance, wherein the first metal material has a recess; andfilling an entire width of a top portion of the opening with a homogeneous second metal material having a second resistance less than the first resistance, wherein the homogeneous second metal material has a protrusion extending into the recess, and a maximum width of the homogeneous second metal material is equal to a maximum width of the first metal material, wherein a top surface of the gate dielectric layer is co-planar with a top surface of the homogeneous second metal material.
地址 TW