发明名称 |
Selective cache fills in response to write misses |
摘要 |
A cache memory receives a request to perform a write operation. The request specifies an address. A first determination is made that the cache memory does not include a cache line corresponding to the address. A second determination is made that the address is between a previous value of a stack pointer and a current value of the stack pointer. A third determination is made that a write history indicator is set to a specified value. The write operation is performed in the cache memory without waiting for a cache fill corresponding to the address to be performed, in response to the first, second, and third determinations. |
申请公布号 |
US9128856(B2) |
申请公布日期 |
2015.09.08 |
申请号 |
US201313854724 |
申请日期 |
2013.04.01 |
申请人 |
ADVANCED MICRO DEVICES, INC. |
发明人 |
Thottethodi Mithuna;Eckert Yasuko;Manne Srilatha |
分类号 |
G06F12/08 |
主分类号 |
G06F12/08 |
代理机构 |
Park, Vaughan, Fleming & Dowler LLP |
代理人 |
Park, Vaughan, Fleming & Dowler LLP |
主权项 |
1. A method of managing cache memory, comprising:
in a cache memory, receiving a first request to perform a first write operation, the first request specifying a first address; making a first determination that the cache memory does not include a cache line corresponding to the first address; making a second determination that the first address is between a previous value of a stack pointer and a current value of the stack pointer; making a third determination that a write history indicator is set to a specified value; and performing the first write operation in the cache memory without waiting for a cache fill corresponding to the first address to be performed, in response to the first, second, and third determinations. |
地址 |
Sunnyvale CA US |