发明名称 System and method for direct memory access buffer utilization by setting DMA controller with plurality of arbitration weights associated with different DMA engines
摘要 A DMA controller allocates space at a buffer to different DMA engines based on the length of time data segments have been stored at a buffer. This allocation ensures that DMA engines associated with a destination that is experiencing higher congestion will be assigned less buffer space than a destination that is experiencing lower congestion. Further, the DMA controller is able to adapt to changing congestion conditions at the transfer destinations.
申请公布号 US9128925(B2) 申请公布日期 2015.09.08
申请号 US201213454505 申请日期 2012.04.24
申请人 Freescale Semiconductor, Inc. 发明人 Jokinen Tommi M.;Kramer David B.;Xu Kun
分类号 G06F13/14;G06F13/28 主分类号 G06F13/14
代理机构 代理人
主权项 1. A method, comprising: assigning space at a buffer of a direct memory access (DMA) controller to a first DMA engine based on the amount of time a first data segment has been stored at the buffer, the first data segment to be transferred by the first DMA engine, the buffer to store data segments for a plurality of DMA engines including the first DMA engine.
地址 Austin TX US