发明名称 |
FAST SETTLING MIXED SIGNAL PHASE INTERPOLATOR WITH INTEGRATED DUTY CYCLE CORRECTION |
摘要 |
Described is an apparatus which comprises: a current steering digital-to-analog converter (DAC) to receive a digital bus to control current steering; a switch capacitor network to integrate currents from the DAC, the switch capacitor network having switches which are controllable by a plurality of digital clock signals; an output stage to compare the integrated currents against at least two threshold voltages and to generate an output signal; and a duty cycle corrector (DCC) operable to adjust the at least two threshold voltages to modify duty cycle of the output signal. |
申请公布号 |
US2015249454(A1) |
申请公布日期 |
2015.09.03 |
申请号 |
US201414194249 |
申请日期 |
2014.02.28 |
申请人 |
GIACONI Stefano;XU Mingming |
发明人 |
GIACONI Stefano;XU Mingming |
分类号 |
H03L7/081;H04L7/033 |
主分类号 |
H03L7/081 |
代理机构 |
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代理人 |
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主权项 |
1. An apparatus comprising:
a current steering digital-to-analog converter (DAC) to receive a digital bus to control current steering; a plurality of switches each of which is controllable by a clock signal and each of which is coupled to the DAC, the plurality of switches are operable to provide a first current and a second current; an integrator which is operable to be reset, the integrator coupled to the plurality of switches; and an output stage coupled to the integrator to provide rising and falling edges of an output signal. |
地址 |
Phoenix AZ US |